The invention relates to a method and circuit for providing a low ripple regulated output voltage of greater magnitude than an unregulated input voltage applied to the circuit.
FIG. 1A shows a conventional charge pump 1 in which an input voltage VIN is applied between an input terminal 2 and the ground conductor 3. During a first phase, a pair of switches 4 and 8 are closed to connect the upper terminal 5 and the lower terminal 9 of a pump capacitor CPMP to VIN and to ground, respectively. A pair of switches 6 and 10 each have a terminal connected to terminal 5 and to terminal 9, respectively. Both of switches 6 and 10 are open during the first phase. The pump capacitor CPMP therefore is charged to VIN during the first phase. During a second phase, switches 4 and 8 are open, and switches 6 and 10 are closed, as shown in FIG. 1B. Switch 6 connects the upper terminal 5 of CPMP to output conductor 7, which is connected to the upper terminal of output capacitor COUT. Switch 10 connects the lower terminal 9 of CPMP to VIN. As the first and second phases are repeated, the output voltage VOUT on conductor 7 increases to 2 VIN. However, conventional charge pump 1 produces a large ripple voltage, typically of approximately 50 millivolts amplitude, in VOUT. This is because pump capacitor CPMP is repetitively connected and disconnected between VIN and VOUT, causing a ripple voltage proportional to the ratio between CPMP and COUT.
In some applications, a much lower level of ripple voltage amplitude may be required, for example, in a DC-to-DC converter used as a power supply for a precision voltage reference, a low-noise, low-offset operational amplifier, or any application sensitive to noise or perturbations on the power supply voltage. Reducing the ripple voltage by filtering may be unduly impractical and expensive because of the size and cost of the components needed to implement the filter. Some applications of low noise DC-to-DC converter circuits include their use in cell phones, PDAs (personal digital assistants), VCO (voltage controlled oscillator) and PLL (phase locked loop) power supplies, and smart card readers.
FIG. 2 shows a conventional linear voltage regulator 12 in which an operational amplifier 13 has its (xe2x88x92) input connected to a reference voltage VREF and output connected to the gate of a P-channel pass transistor 14. The source of pass transistor 14 is connected by conductor 17 to an unregulated input voltage VIN. The drain of pass transistor 14 is connected by conductor 15 to produce a regulated output voltage VOUT on one terminal of an output capacitor COUT having to the terminal connected to ground. A feedback circuit includes a resistor RF and a resistor RS connected in series between VOUT and ground. The junction between resistor RF and resistor RS is connected by conductor 16 to the (+) of operational amplifier 13. Regulator 12 always produces a value of VOUT having a lower magnitude than VIN.
Linear Technology Corporation markets a linear regulator circuit, the LTC 1682, that utilizes a charge pump connected to supply the input voltage of a linear regulator circuit similar to the regulator shown in FIG. 2. Although this linear regulator circuit is referred to in its product specification sheet as a xe2x80x9clow noise linear regulatorxe2x80x9d, it nevertheless has the shortcoming that it produces a large ripple voltage (i.e., a large noise voltage) superimposed on the regulated output voltage produced.
Thus, there is an unmet need for an improved charge pump circuit that is capable of boosting an input voltage so as to provide a boosted output voltage having a much lower ripple voltage than conventional charge pump circuits.
There also is an unmet need for an improved DC-to-DC converter circuit that is capable of boosting an input voltage to provide a boosted output voltage having a much lower ripple voltage than conventional DC-to-DC converter circuits.
Accordingly, it is an object of the invention to provide an improved charge pump circuit that is capable of boosting an input voltage so as to provide a boosted output voltage having a much lower ripple voltage than conventional charge pump circuits.
It is another object of the invention to provide an improved charge pump circuit that is capable of boosting an input voltage so as to provide a boosted output voltage having a low ripple voltage, which charge pump circuit is conveniently scalable to boost the input voltage to produce a higher amplitude, low ripple output voltage by using multiple pump capacitors.
It is another object of the invention to provide a DC-to-DC converter that is capable of boosting an input voltage so as to provide a boosted output voltage having a low ripple voltage, including a charge pump circuit that is conveniently scalable to boost the input voltage of the DC-to-DC converter to produce a higher amplitude, low ripple output voltage.
It is another object of the invention to provide an improved DC-to-DC converter circuit that is capable of boosting an input voltage so as to provide a boosted output voltage having a low ripple voltage, which DC-to-DC converter circuit is conveniently scalable to boost the input voltage to produce a higher amplitude, low-ripple output voltage by using an inductor and capacitor.
Briefly described, and in accordance with one embodiment thereof, the invention provides a DC-to-DC conversion circuit having an input conductor for receiving an input voltage (VIN) and an output conductor (15) for conducting an output voltage (VOUT), the DC-to-DC conversion circuit, including a pass transistor (14) having a first electrode coupled to receive the input voltage (VIN) and a second electrode coupled to a first conductor (17). An amplifier circuit (13) has a first input coupled to receive a first reference voltage (VREF) and an output coupled to a control electrode of the pass transistor. Level shifting circuitry (18) is coupled to the first conductor (17), the output conductor (15), the input conductor, and a conductor conducting a second reference voltage (GND), wherein the level shifting circuitry is capable of providing energy needed to boost the output voltage to a required level. A feedback circuit is coupled between the output conductor (15) and a second input of the amplifying circuit (13).
In one embodiment, the invention provides a circuit for boosting an input voltage (VIN) to provide a low ripple output voltage (VOUT) by regulating flow of current between a source of the input voltage (VIN) and a circuit node (17) in response to a feedback signal (16) representative of the output voltage (VOUT). A charge pump circuit operates to repetitively charge a pump element (CPMP or LPMP) to a voltage determined by the input voltage (VIN) and redistribute charge between the pump element and a level-shifting capacitor (CLS) coupled between the circuit node (17) and an output conductor (15) conducting the output voltage (VOUT) so as to maintain the boosted output voltage (VOUT).
In one embodiment a DC-to-DC conversion circuit having an input conductor receiving an input voltage (VIN) and an output conductor (15) for conducting an output voltage (VOUT), the DC-to-DC conversion circuit includes a pass transistor (14) having a first electrode coupled to receive the input voltage (VIN) and the second electrode coupled to the circuit node (17). An amplifier circuit (13) driving the pass transistor has a first input coupled to receive a first reference voltage (VREF) and second input receiving the feedback signal (16). A level-shifting isolation capacitor (CLS) is coupled between the circuit node (17) and the output conductor (15). A charge pump circuit includes a first input terminal coupled to receive a second reference voltage (GND), a second input terminal coupled to receive the input voltage (VIN), a first output terminal coupled to the circuit node (17), and a second output terminal coupled to the output conductor (15). The charge pump circuit includes a pump capacitor (CPMP), a first switch (20) coupled between the circuit node (17) and a first terminal (21) of the pump capacitor, a second switch (22) coupled between the first terminal of the pump capacitor and the second reference voltage (GND), a third switch (23) coupled between the output conductor (15) and a second terminal (24) of the pump capacitor, and a fourth switch (25) coupled between the second terminal of the pump capacitor and the input voltage (VIN). The feedback circuitry includes a first resistor coupled between the output conductor and the second input of the amplifier circuitry and a second resistor coupled between the second input of the amplifier circuitry and the second reference voltage (GND). The first switch (20) is a P-channel transistor having a source coupled to the circuit node (17) and a drain coupled to the first terminal of the pump capacitor, the second switch (22) is an N-channel transistor having a source coupled to the second reference voltage and a drain coupled to the first terminal of the pump capacitor, the third switch (23) is a P-channel transistor having a source coupled to the output conductor (15) and a drain coupled to the second terminal of the pump capacitor, and the fourth switch (25 is a P-channel transistor having a source coupled to the input voltage (VIN) and a drain coupled to the second terminal of the pump capacitor. The capacitance of the level-shifting isolation capacitor (CLS) is substantially greater than the capacitance of the pump capacitor, and wherein an output capacitance (COUT) is substantially greater than the capacitance of the level-shifting isolation capacitor.
In another embodiment, the charge pump circuitry includes a first pump capacitor (CPMP1), a first switch (20) coupled between the first conductor (17) and a first terminal (21) of the first pump capacitor, a second switch (22) coupled between the first terminal of the first pump capacitor and the second reference voltage (GND), a third switch (27) coupled between a second terminal (24) of the first pump capacitor and a first terminal (31) of a second pump capacitor (CPMP2), a fourth switch coupled between the second terminal (24) of the first pump capacitor and the input voltage (VIN), a fifth switch (28) coupled between the first terminal (31) of the second pump capacitor (CPMP2) and the second reference voltage (GND), between the output conductor (15) and a second terminal (24) of the pump capacitor, a sixth switch (30) coupled between a second terminal of the second pump capacitor (CPMP2) and the input voltage (VIN), and coupling circuitry coupled between the output conductor (15) and the second terminal of the second pump capacitor (CPMP2). The described coupling circuitry includes a seventh switch (23) coupled between the output conductor (15) and the second terminal of the second pump capacitor (CPMP2).
In another embodiment, an input voltage (VIN) is boosted to provide a low ripple output voltage (VOUT) by regulating flow of current between a source of the input voltage (VIN) and a circuit node (17) in response to a feedback signal (16) representative of the output voltage (VOUT), and operating DC-to-DC converter circuitry to repetitively charge a pump inductor (LPMP) to a current supplied by a source of the input voltage (VIN) and redistribute energy stored in the pump inductor between the pump inductor (LPMP) and a level-shifting capacitor (CLS) coupled between the circuit node (17) and an output conductor (15) conducting the output voltage (VOUT) so as to maintain the output voltage (VOUT) at a regulated level of substantially greater magnitude than the input voltage (VIN).
In another embodiment, the invention provides a DC-to-DC conversion circuit having an input conductor for receiving a positive polarity input voltage (VIN) and an output conductor (15) for conducting a negative polarity output voltage (VOUT), the DC-to-DC conversion circuit including a pass transistor (14B) having a first electrode coupled to receive a first reference voltage (GND) and a second electrode coupled to a first conductor (17). An amplifier circuit (13) has a first input coupled to receive a first reference voltage (VREF) and an output coupled to a control electrode of the pass transistor. Level shifting circuitry (18D) is coupled to the first conductor (17), the output conductor (15), the input conductor, and a conductor conducting the second reference voltage (GND), wherein the level shifting circuitry is capable of providing energy needed to boost the output voltage in the negative direction to a required level. A feedback circuit coupled between the output conductor (15) and a second input of the amplifying circuit (13).